As will be appreciated by those skilled in the art, a instruction which copies the contents of a register to another register is used to preserve data that may be altered in response to one instruction but may be needed by a subsequent instruction. For example, a program includes a first instruction that uses the same register for both the data source and data target. For example, an instruction to add the content of register R1 to the content of register R2 and store the result in register R1. If a subsequently executing instruction requires the original contents of register R1 prior to the add instruction then a copy register instruction must be inserted into the program prior to the add instruction to copy the original contents of register R1 to another register R3. In S/390 the Load Register (LR) instruction provides this copy capability.
FIG. 1 is a block diagram of a prior art apparatus and method in an out of order microprocessor for assigning a register to store the original content of R1 so it is available as a data source for a subsequently executed instruction. For example, the instruction LR 7, 12 copies the contents of logical register 12 into logical register 7. As illustrated in FIG. 1, an architected to physical register mapper receives as inputs the architected target register and the architected source register. A physical register from the free register pool is assigned to hold the copied data.
It will be appreciated that the LR instruction merely preserves data for possible future use and in this sense does not perform useful computation. In addition, the execution of an LR instruction uses hardware resources: a physical registers, an issue queue entry, and a fixed-point unit execution cycle. Further, instructions using the data saved by the LR instruction cannot execute until the data is physically stored in the assigned physical target register.